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IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 1 dual 1.3w stereo audio amplifier december 2011 general description the IS31AP4066D is a dual bridge-connected audio power amplifier which, when connected to a 5v supply, will deliver 1.3w to an 8 ? load. the IS31AP4066D features a low-power consumption shutdown mode and thermal shutdown protection. it also utilizes circuitry to re duce ?click-and-pop? during device turn-on. applications ? cell phones, pda, mp4,pmp ? portable and desktop computers ? desktops audio system ? multimedia monitors key specifications ? p o at r l = 8 ? , v dd = 5v thd+n = 1% ---------------------- 1.3w (typ.) thd+n = 10% --------------------- 1.6w (typ.) ? p o at r l = 8 ? , v dd = 4v thd+n = 1% ----------------------- 0.81w (typ.) ? shutdown current ------------------- 0.3 a (typ.) ? supply voltage range --------------- 2.7v ~ 5.5v ? qfn-16 (3mm 3mm) package features ? suppress ?click-and-pop? ? thermal shutdown protection circuitry ? micro power shutdown mode typical application circuit r3 20k r1 20k r2 20k r4 20k vdd -outa +outa +outb -outb bypass gnd ina inb + - - - - + + + 4 8 9 5,6,7,13,14,16 10 12 1 3 2,11 shutdown 15 vcc vcc c3 1uf c4 1uf c2 0.22uf c1 0.22uf working shutdown inb bnc ina bnc figure 1 typical application circuit
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 2 pin configuration package pin configuration (top view) qfn-16 1 gnd +outa gnd gnd gnd gnd ina 2 3 4 16 9 10 11 12 15 14 13 5 6 7 8 shutdown v dd -outa gnd inb bypass - outb v dd +outb pin description no. pin description 1 +outa left channel +output. 2,11 v dd supply voltage. 3 -outa left channel ?output. 4 ina left channel input. 5~7,13,14,16 gnd gnd. 8 bypass bypass capacitor which provides the common mode voltage. 9 inb right channel input. 10 -outb right channel ?output. 12 +outb right channel +output. 15 shutdown ???????????? shutdown control, hold low for shutdown mode. thermal pad connect to gnd. copyright ? ? ? 2011 ? integrated ? silicon ? solution, ? inc. ? all ? rights ? reserved. ? issi ? reserves ? the ? right ? to ? make ? changes ? to ? this ? specification ? and ? its ? products ? at ? any ? time ? without ? notice. ? issi ? assumes ? no ? liability ? arising ? out ? of ? the ? application ? or ? use ? of ? any ? information, ? products ? or ? services ? described ? herein. ? customers ? are ? advised ? to ? obtain ? the ? latest ? version ? of ? this ? device ? specification ? before ? relying ? on ? any ? published ? information ? and ? before ? placing ? orders ? for ? products. ? integrated ? silicon ? solution, ? inc. ? does ? not ? recommend ? the ? use ? of ? any ? of ? its ? products ? in ? life ? support ? applications ? where ? the ? failure ? or ? malfunction ? of ? the ? product ? can ? reasonably ? be ? expected ? to ? cause ? failure ? of ? the ? life ? support ? system ? or ? to ? significantly ? affect ? its ? safety ? or ? effectiveness. ? products ? are ? not ? authorized ? for ? use ? in ? such ? applications ? unless ? integrated ? silicon ? solution, ? inc. ? receives ? written ? assurance ? to ? its ? satisfaction, ? that: ? a.) ? the ? risk ? of ? injury ? or ? damage ? has ? been ? minimized; ? b.) ? the ? user ? assume ? all ? such ? risks; ? and ? c.) ? potential ? liability ? of ? integrated ? silicon ? solution, ? inc ? is ? adequately ? protected ? under ? the ? circumstances
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 3 ordering information industrial range: -40c to +85c order part no. package qty/reel IS31AP4066D-qfls2-tr qfn-16, lead-free 2500
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 4 absolute maximum ratings supply voltage, v dd - 0.3v ~ +6.0v voltage at any input pin - 0.3v ~ v dd +0.3v junction temperature, t jmax - 40c ~ +150c storage temperature range, tstg - 65c ~ +150c operating temperature ratings ? 40c ~ +85c solder information, vapor phase (60s) infrared (15s) 215c 220c note: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the sp ecifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics the following specifications apply for v dd = 5v, unless otherwise noted. limits apply for t a = 25c. (note 1 or specified) symbol parameter condition typ. limit unit v dd supply voltage 2.7 v(min) 5.5 v(max) i dd quiescent power supply current v in = 0v, io = 0a 3.9 10.0 ma(max) i sd shutdown current gnd applied to the shutdown pin 0.3 2.5 a(max) v ih shutdown input voltage high 1.4 v(min) v il shutdown input voltage low 0.4 v(max) t wu turn on time 1 f bypass cap(c4) (note 2) 120.0 ms electrical characteristics operation the following specifications apply for v dd = 5v, unless otherwise noted. limits apply for t a = 25c. (note 2 or specified) symbol parameter condition typ. limit unit vos output offset voltage v in = 0v 5.0 25.0 mv(max) po output power thd+n = 1%, f = 1khz, r l = 8 ? 1.3 w(min) thd+n = 10%, f = 1khz, r l = 8 ? 1.6 w(min) thd+n total harmonic distortion +noise 1khz, avd = 2, r = 8 ? , po = 1w 0.1 % psrr power supply rejection ratio input floating, 217hz, v ripple = 200mv p-p c4 = 1 f, r l = 8 ? 80.0 db input floating 1khz, v ripple = 200mv p-p c4 = 1 f, r l = 8 ? 70.0 db input gnd 217hz, v ripple = 200mv p-p c4 = 1 f, r l =8 ? 60.0 db input gnd 1khz v ripple = 200mv p-p c4 = 1 f, r l = 8 ? 60.0 db x talk channel separation f = 1khz, c4 = 1 f -100.0 db v no output noise voltage 1khz, a-weighted 7.0 v
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 5 electrical characteristics the following specifications apply for v dd = 3v, unless otherwise noted. limits apply for t a = 25c. (note 1 or specified) symbol parameter condition typ. limit unit i dd quiescent power supply current v in = 0v, i o = 0a 2.6 6.5 ma(max) i sd shutdown current gnd applied to the shutdown pin 0.1 2.2 a(max) v ih shutdown input voltage high 1.1 v(min) v il shutdown input voltage low 0.4 v(max) t wu turn on time 1 f bypass cap(c4) (note 2) 110 ms electrical characteristics operation the following specifications apply for v dd = 3v, unless otherwise noted. limits apply for t a = 25c. (note 2 or specified) symbol parameter condition typ. limit unit vos output offset voltage v in =0v 2.5 25.0 mv po output power thd+n = 1%, f = 1khz, r l = 8 ? 0.5 w thd+n = 10%, f = 1khz, r l = 8 ? 0.6 w thd+n total harmonic distortion+noise 1khz, avd = 2, r l = 8 ? , po = 0.3w 0.1 % psrr power supply rejection ratio input floating, 217hz, v ripple = 200mv p-p c4 = 1 f, r l = 8 ? 75.0 db input floating 1khz, v ripple = 200mv p-p c4 = 1 f, r l = 8 ? 70.0 db input gnd 217hz, v ripple = 200mv p-p c4 = 1 f, r l =8 ? 62.0 db input gnd 1khz v ripple = 200mv p-p c4 = 1 f, r l = 8 ? 62.0 db x talk channel separation f = 1khz, c4 = 1 f -100.0 db v no output noise voltage 1khz, a-weighted 7.0 uv note1: all parameters are production tested at 25c, functional operation of the device and parameters specified over other temperatu re range, are guaranteed by design, characterization and process control. note 2: guaranteed by design.
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 6 typical performance characteristics vcc = 5v r l f = 1khz figure 2 thd+n vs. output power vcc = 5v r l po = 1w figure 4 thd+n vs. frequency vcc = 5v r l input gnd figure 6 psrr vs. frequency vcc = 3v r l f = 1khz figure 3 thd+n vs. output power vcc = 3v r l po=300mw figure 5 thd+n vs. frequency vcc = 3v r l input gnd figure 7 psrr vs. frequency
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 7 vcc = 5v r l input floating figure 8 psrr vs. frequency vcc = 3v r l input floating figure 10 psrr vs. frequency vcc = 5v r l figure 12 frequency response vcc = 5v r l figure 9 crosstalk vs. frequency vcc = 5v r l a-weighting figure 11 noise floor vcc = 3v r l figure 13 frequency response
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 8 vcc = 3v r l figure 14 crosstalk vs. frequency r l top side bottom side figure 16 dropout voltage vs. supply voltage r l f = 1khz thd+n = 10% thd+n = 1% figure18 output power vs. supply voltage vcc = 3v r l a-weighting figure 15 noise floor vcc = 5v r l f = 1khz output power (w) figure 17 power dissipation vs. output power
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 9 application information exposed-dap package pcb mounting considerations the IS31AP4066D?s qfn (die attach paddle) package provides a low thermal resistance between the die and the pcb to which the part is mounted and soldered. this allows rapid heat transfer from the die to the surrounding pcb copper traces, ground plane and, finally, surrounding air. the qfn package must have it?s dap soldered to a copper pad on the pcb. the dap?s pcb copper pad is connected to a large plane of continuous unbroken copper. this plane forms a thermal mass and heat sink and radiation area. place the heat sink area on either outside plane in the case of a two-sided pcb, or on an inner layer of a board with more than two layers. bridge configuration explanation as shown in figure 2, the IS31AP4066D consists of two pairs of operational amplifiers, forming a two-channel (channel a and channel b) stereo amplifier. external feedback resistors r 2 , r 4 and input resistors r 1 and r 3 set the closed-loop gain of amp a (-out) and amp b (-out) whereas two internal 20k ? resistors set amp a?s (+out) and amp b?s (+out) gain at 1. the IS31AP4066D drives a load, such speaker, connected between the two amplifier outputs, ? outa and +outa. figure 2 shows that amp a?s (-out) output serves as amp a?s (+out) input. this results in both amplifiers producing signals identical in magnitude, but 180 out of phase. taking advantage of this phase difference, a load is placed between ? outa and +outa and driven differentially (commonly referred to as ?bridge mode?). this results in a differential gain of a vd = 2(r f /r i ) (1) or a vd = 2(r 2 /r 1 ) bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single amplifier?s output and ground. for a given supply voltage, bridge mode has a distinct advantage over the single-ended configuration: its differential output doubles the voltage swing across the load. this produces four times the output power when compared to a single-ended amplifier under the same conditions. this increase in attainable output power assumes that the amplifier is not current limited another advantage of the differential bridge output is no net dc voltage across the load. this is accomplished by biasing channel a?s and channel b?s outputs at half-supply. this eliminates the coupling capacitor that single supply, single ended amplifiers require. eliminating an output coupling capacitor in a single-ended configuration forces a single-supply amplifier?s half-supply bias voltage across the load. this increases internal ic power dissipation and may permanently damage loads such as speakers. power dissipation power dissipation is a major concern when designing a successful single-ended or bridged amplifier. equation (2) states the maximum power dissipation point for a single ended amplifier operating at a given supply voltage and driving a specified output load. p dmax = (v dd ) 2 /(2 2 r l ) single-ended (2) however, a direct consequence of the increased power delivered to the load by a bridge amplifier is higher internal power dissipation for the same conditions. the IS31AP4066D has two operational amplifiers per channel. the maximum internal power dissipation per channel operating in the bridge mode is four times that of a single-ended amplifier. from equation (3), assuming a 5v power supply and an 8 ? load, the maximum single channel power dissipation is 0.63w or 1.26w for stereo operation. p dmax = 4(v dd ) 2 /(2 2 r l ) bridge mode (3) the IS31AP4066D?s power dissipation is twice that given by equation (2) or equation (3) when operating in the single-ended mode or bridge mode, respectively. twice the maximum power dissipation point given by equation (3) must not exceed the power dissipation given by equation (4): p dmax ' = (t jmax ? t a )/ ja (4) the IS31AP4066D?s t jmax = 150c. in the qfn package soldered to a dap pad that expands to a copper area of 5in 2 on a pcb, the IS31AP4066D?s ja is 23c/w. at any given ambient temperature t a , use equation (4) to find the maximum internal power dissipation supported by the ic packaging. rearranging equation (4) and substituting p dmax for p dmax ' results in equation (5). this equation gives the maximum ambient temperature that still allows maximum stereo power dissipation without violating the IS31AP4066D?s maximum junction temperature. t a = t jmax ? 2p dmax ja (5) for a typical application with a 5v power supply and an 8 ? load, the maximum ambient temperature that allows maximum stereo power dissipation without exceeding the maximum junction temperature is approximately 85c for the qfn package. t jmax = p dmax ja + t a (6) equation (6) gives the maximum junction temperature t jmax . if the result violates the IS31AP4066D?s 150c, reduce the maximum junction temperature by reducing the power supply voltage or increasing the load resistance. further allowance should be made for
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 10 increased ambient temperatures. the above examples assume that a device is a surface mount part operating around the maximum power dissipation point. since internal power dissipation is a function of output power, higher ambient temperatures are allowed as output power or duty cycle decreases. if the result of equation (2) is greater than that of equation (3), then decrease the supply voltage, increase the load impedance, or reduce the ambient temperature. if these measures are insufficient, a heat sink can be added to reduce ja . the heat sink can be created using additional copper area around the package, with connections to the ground pin(s), supply pin and amplifier output pins. the ja is the sum of jc , cs , and sa . ( jc is the junction-to-case thermal impedance, cs is the case-to-sink thermal impedance, and sa is the sink-to-ambient thermal impedance.) power supply bypassing as with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. applications that employ a 5v regulator typically use a 10 f in parallel with a 0.1 f filter capacitor to stabilize the regulator?s output, reduce noise on the supply line, and improve the supply?s transient response. however, their presence does not eliminate the need for a local 1.0 f tantalum bypass capacitance connected between the IS31AP4066D?s supply pins and ground. keep the length of leads and traces that connect capacitors between the IS31AP4066D?s power supply pin and ground as short as possible. micro-power shutdown the voltage applied to the shutdown pin controls the IS31AP4066D?s shutdown function. activate micro-power shutdown by applying gnd to the shutdown pin. when active, the IS31AP4066D?s micro-power shutdown feature turns off the amplifier?s bias circuitry, reducing the supply current. the low 0.3 a typical shutdown current is achieved by applying a voltage that is as near as gnd as possible to the shutdown pin. there are a few ways to control the micro-power shutdown. these include using a single-pole, single-throw switch, a microprocessor, or a microcontroller. when use a switch, connect an external 100k resistor between the shutdown pin and gnd. select normal amplifier operation by closing the switch. opening the switch sets the shutdown pin to ground through the 100k resistor, which activates the micropower shutdown. the switch and resistor guarantee that the shutdown pin will not float. this prevents unwanted state changes. in a system with a microprocessor or a microcontroller, use a digital output to apply the control voltage to the shutdown pin. driving the shutdown pin with active circuitry eliminates the pull up resistor. selecting proper external components optimizing the IS31AP4066D?s performance requires properly selecting external components. though the IS31AP4066D operates well when using external components with wide tolerances, best performance is achieved by optimizing component values. the IS31AP4066D is unity-gain stable, giving a designer maximum design flexibility. the gain should be set to no more than a given application requires. this allows the amplifier to achieve minimum thd+n and maximum signal-to-noise ratio. these parameters are compromised as the closed-loop gain increases. however, low gain demands input signals with greater voltage swings to achieve maximum output power. fortunately, many signal sources such as audio codecs have outputs of 1vrms (2.83vp-p). please refer to the audio power amplifier design section for more information on selecting the proper gain. input capacitor value selection amplifying the lowest audio frequencies requires high value input coupling capacitors (c 1 and c 2 ) in figure 2. a high value capacitor can be expensive and may compromise space efficiency in portable designs. in many cases, however, the speakers used in portable systems, whether internal or external, have little ability to reproduce signals below 150 hz. applications using speakers with this limited frequency response reap little improvement by using large input capacitor. besides effecting system cost and size, c 1 and c 2 have an effect on the IS31AP4066D?s click and pop performance. when the supply voltage is first applied, a transient (pop) is created as the charge on the input capacitor changes from zero to a quiescent state. the magnitude of the pop is directly proportional to the input capacitor?s size. higher value capacitors need more time to reach a quiescent dc voltage (usually v dd /2) when charged with a fixed current. the amplifier?s output charges the input capacitor through the feedback resistors, r 2 and r 4 . thus, pops can be minimized by selecting an input capacitor value that is no higher than necessary to meet the desired ? 3db frequency. a shown in figure 2, the input resistors (r1 and r3) and the input capacitors (c1 and c2) produce a ? 3db high pass filter cutoff frequency that is found using equation (7). f -3db = 1/2 r in c in = 1/2 r 1 c 1 (7) as an example when using a speaker with a low frequency limit of 150hz, c1, using equation (7) is 0.053 f. the 0.33 f c1 shown in figure 2 allows the IS31AP4066D to drive high efficiency, full range speaker whose response extends below 30hz.
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 11 bypass capacitor value selection besides minimizing the input capacitor size, careful consideration should be paid to value of c4, the capacitor connected to the bypass pin. since c4 determines how fast the IS31AP4066D settles to quiescent operation, its value is critical when minimizing turn-on pops. the slower the IS31AP4066D?s outputs ramp to their quiescent dc voltage (nominally 1/2 v dd ), the smaller the turn-on pop. choosing c4 equal to 1.0 f along with a small value of c1 (in the range of 0.1 f to 0.39 f), produces a click-less and pop-less shutdown function. as discussed above, choosing c1 no larger than necessary for the desired bandwith helps minimize clicks and pops. connecting a 1 f capacitor, c4, between the bypass pin and ground improves the internal bias voltage?s stability and improves the amplifier?s psrr. optimizing click and pop reduction performance the IS31AP4066D contains circuitry that minimizes turn-on and shutdown transients or ?clicks and pop?. for this discussion, turn-on refers to either applying the power supply voltage or when the shutdown mode is deactivated. when the part is turned on, an internal current source changes the voltage of the bypass pin in a controlled, linear manner. ideally, the input and outputs track the voltage applied to the bypass pin. the gain of the internal amplifiers remains unity until the voltage on the bypass pin reaches 1/2 v dd . as soon as the voltage on the bypass pin is stable, the device becomes fully operational. although the bypass pin current cannot be modified, changing the size of c4 alters the device?s turn-on time and the magnitude of ?clicks and pops?. increasing the value of c4 reduces the magnitude of turn-on pops. however, this presents a tradeoff: as the size of c4 increases, the turn-on time increases. there is a linear relationship between the size of c4 and the turn-on time. here are some typical turn-on times for various values of c4 (all tested at v dd =5v): c 4 t on 0.01 f 13ms 0.1 f 26ms 0.22 f 44ms 0.47 f 68ms 1.0 f 120 ms in order eliminate ?clicks and pops?; all capacitors must be discharged before turn-on. rapidly switching v dd on and off may not allow the capacitors to fully discharge, which may cause ?clicks and pops?.
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 12 classification reflow profiles profile feature pb-free assembly preheat & soak temperature min (tsmin) temperature max (tsmax) time (tsmin to tsmax) (ts) 150c 200c 60-120 seconds average ramp-up rate (tsmax to tp) 3c/second max. liquidous temperature (tl) time at liquidous (tl) 217c 60-150 seconds peak package body temperature (tp)* max 260c time (tp)** within 5c of the specified classification temperature (tc) max 30 seconds average ramp-down rate (tp to tsmax) 6c/second max. time 25c to peak temperature 8 minutes max. figure 19 classification profile
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 13 tape and reel information
IS31AP4066D integrated silicon solution, inc. ? www.issi.com rev.a, 11/29/2011 14 package information qfn-16 note: all dimensions in millimeters unless otherwise stated.

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